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Microchip Technology /ATSAMV71J20 /PWM0 /OSC

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Interpret as OSC

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (OSCH0)OSCH0 0 (OSCH1)OSCH1 0 (OSCH2)OSCH2 0 (OSCH3)OSCH3 0 (OSCL0)OSCL0 0 (OSCL1)OSCL1 0 (OSCL2)OSCL2 0 (OSCL3)OSCL3

Description

PWM Output Selection Clear Register

Fields

OSCH0

Output Selection Clear for PWMH output of the channel 0
OSCH1

Output Selection Clear for PWMH output of the channel 1
OSCH2

Output Selection Clear for PWMH output of the channel 2
OSCH3

Output Selection Clear for PWMH output of the channel 3
OSCL0

Output Selection Clear for PWML output of the channel 0
OSCL1

Output Selection Clear for PWML output of the channel 1
OSCL2

Output Selection Clear for PWML output of the channel 2
OSCL3

Output Selection Clear for PWML output of the channel 3

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data